Restructure project: remove LED demo, switch to Flash linker
This commit is contained in:
68
.cproject
68
.cproject
@ -22,30 +22,30 @@
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|||||||
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@ -53,34 +53,35 @@
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<listOptionValue value="${INSTALLROOT_F2802x}/common/include"/>
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<listOptionValue value="${INSTALLROOT_F2802x}/common/include"/>
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|
||||||
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|
<listOptionValue value="${COM_TI_C2000WARE_LIBRARIES}"/>
|
||||||
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|
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||||||
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||||||
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|
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||||||
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|
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|
||||||
@ -88,14 +89,17 @@
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|||||||
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|
||||||
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||||||
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|
||||||
</toolChain>
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</toolChain>
|
||||||
</folderInfo>
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</folderInfo>
|
||||||
|
<sourceEntries>
|
||||||
|
<entry excluding="F2802x_generic_ram.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||||
|
</sourceEntries>
|
||||||
</configuration>
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</configuration>
|
||||||
</storageModule>
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</storageModule>
|
||||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
|
|||||||
@ -2,5 +2,7 @@ eclipse.preferences.version=1
|
|||||||
encoding//Debug/makefile=UTF-8
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encoding//Debug/makefile=UTF-8
|
||||||
encoding//Debug/objects.mk=UTF-8
|
encoding//Debug/objects.mk=UTF-8
|
||||||
encoding//Debug/sources.mk=UTF-8
|
encoding//Debug/sources.mk=UTF-8
|
||||||
|
encoding//Debug/src/subdir_rules.mk=UTF-8
|
||||||
|
encoding//Debug/src/subdir_vars.mk=UTF-8
|
||||||
encoding//Debug/subdir_rules.mk=UTF-8
|
encoding//Debug/subdir_rules.mk=UTF-8
|
||||||
encoding//Debug/subdir_vars.mk=UTF-8
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encoding//Debug/subdir_vars.mk=UTF-8
|
||||||
|
|||||||
@ -1,265 +0,0 @@
|
|||||||
//###########################################################################
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|
||||||
//
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|
||||||
// FILE: Example_2802xLedBlink.c
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|
||||||
//
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|
||||||
// TITLE: f2802x LED Blink Getting Started Program.
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|
||||||
//
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|
||||||
// ASSUMPTIONS:
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|
||||||
//
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|
||||||
// This program requires the f2802x header files.
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|
||||||
// As supplied, this project is configured for "boot to SARAM"
|
|
||||||
// operation. The 2802x Boot Mode table is shown below.
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|
||||||
//
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|
||||||
// $Boot_Table
|
|
||||||
// While an emulator is connected to your device, the TRSTn pin = 1,
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|
||||||
// which sets the device into EMU_BOOT boot mode. In this mode, the
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|
||||||
// peripheral boot modes are as follows:
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|
||||||
//
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|
||||||
// Boot Mode: EMU_KEY EMU_BMODE
|
|
||||||
// (0xD00) (0xD01)
|
|
||||||
// ---------------------------------------
|
|
||||||
// Wait !=0x55AA X
|
|
||||||
// I/O 0x55AA 0x0000
|
|
||||||
// SCI 0x55AA 0x0001
|
|
||||||
// Wait 0x55AA 0x0002
|
|
||||||
// Get_Mode 0x55AA 0x0003
|
|
||||||
// SPI 0x55AA 0x0004
|
|
||||||
// I2C 0x55AA 0x0005
|
|
||||||
// OTP 0x55AA 0x0006
|
|
||||||
// Wait 0x55AA 0x0007
|
|
||||||
// Wait 0x55AA 0x0008
|
|
||||||
// SARAM 0x55AA 0x000A <-- "Boot to SARAM"
|
|
||||||
// Flash 0x55AA 0x000B
|
|
||||||
// Wait 0x55AA Other
|
|
||||||
//
|
|
||||||
// Write EMU_KEY to 0xD00 and EMU_BMODE to 0xD01 via the debugger
|
|
||||||
// according to the Boot Mode Table above. Build/Load project,
|
|
||||||
// Reset the device, and Run example
|
|
||||||
//
|
|
||||||
// $End_Boot_Table
|
|
||||||
//
|
|
||||||
// DESCRIPTION:
|
|
||||||
//
|
|
||||||
// This example configures CPU Timer0 for a 500 msec period, and toggles the
|
|
||||||
// GPIO34 LED once per interrupt. For testing purposes, this example
|
|
||||||
// also increments a counter each time the timer asserts an interrupt.
|
|
||||||
//
|
|
||||||
// Watch Variables:
|
|
||||||
// CpuTimer0.InterruptCount
|
|
||||||
//
|
|
||||||
// Monitor the GPIO34 LED blink on (for 500 msec) and off (for 500 msec)
|
|
||||||
// on the 2802x control card.
|
|
||||||
//
|
|
||||||
//###########################################################################
|
|
||||||
// $TI Release: $
|
|
||||||
// $Release Date: $
|
|
||||||
// $Copyright:
|
|
||||||
// Copyright (C) 2009-2026 Texas Instruments Incorporated - http://www.ti.com/
|
|
||||||
//
|
|
||||||
// Redistribution and use in source and binary forms, with or without
|
|
||||||
// modification, are permitted provided that the following conditions
|
|
||||||
// are met:
|
|
||||||
//
|
|
||||||
// Redistributions of source code must retain the above copyright
|
|
||||||
// notice, this list of conditions and the following disclaimer.
|
|
||||||
//
|
|
||||||
// Redistributions in binary form must reproduce the above copyright
|
|
||||||
// notice, this list of conditions and the following disclaimer in the
|
|
||||||
// documentation and/or other materials provided with the
|
|
||||||
// distribution.
|
|
||||||
//
|
|
||||||
// Neither the name of Texas Instruments Incorporated nor the names of
|
|
||||||
// its contributors may be used to endorse or promote products derived
|
|
||||||
// from this software without specific prior written permission.
|
|
||||||
//
|
|
||||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
||||||
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
||||||
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
||||||
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
||||||
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
||||||
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
||||||
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
||||||
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
||||||
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
||||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
// $
|
|
||||||
//###########################################################################
|
|
||||||
|
|
||||||
//
|
|
||||||
// Included Files
|
|
||||||
//
|
|
||||||
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
|
|
||||||
|
|
||||||
//
|
|
||||||
// Function Prototypes
|
|
||||||
//
|
|
||||||
__interrupt void cpu_timer0_isr(void);
|
|
||||||
|
|
||||||
//
|
|
||||||
// Main
|
|
||||||
//
|
|
||||||
void main(void)
|
|
||||||
{
|
|
||||||
//
|
|
||||||
// WARNING: Always ensure you call memcpy before running any functions from
|
|
||||||
// RAM InitSysCtrl includes a call to a RAM based function and without a
|
|
||||||
// call to memcpy first, the processor will go "into the weeds"
|
|
||||||
//
|
|
||||||
#ifdef _FLASH
|
|
||||||
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 1. Initialize System Control:
|
|
||||||
// PLL, WatchDog, enable Peripheral Clocks
|
|
||||||
// This example function is found in the f2802x_SysCtrl.c file.
|
|
||||||
//
|
|
||||||
InitSysCtrl();
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 2. Initialize GPIO:
|
|
||||||
// This example function is found in the f2802x_Gpio.c file and
|
|
||||||
// illustrates how to set the GPIO to it's default state.
|
|
||||||
//
|
|
||||||
//InitGpio(); // Skipped for this example
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 3. Clear all interrupts and initialize PIE vector table:
|
|
||||||
// Disable CPU interrupts
|
|
||||||
//
|
|
||||||
DINT;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Initialize the PIE control registers to their default state.
|
|
||||||
// The default state is all PIE interrupts disabled and flags
|
|
||||||
// are cleared.
|
|
||||||
// This function is found in the f2802x_PieCtrl.c file.
|
|
||||||
//
|
|
||||||
InitPieCtrl();
|
|
||||||
|
|
||||||
//
|
|
||||||
// Disable CPU interrupts and clear all CPU interrupt flags
|
|
||||||
//
|
|
||||||
IER = 0x0000;
|
|
||||||
IFR = 0x0000;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Initialize the PIE vector table with pointers to the shell Interrupt
|
|
||||||
// Service Routines (ISR).
|
|
||||||
// This will populate the entire table, even if the interrupt
|
|
||||||
// is not used in this example. This is useful for debug purposes.
|
|
||||||
// The shell ISR routines are found in f2802x_DefaultIsr.c.
|
|
||||||
// This function is found in f2802x_PieVect.c.
|
|
||||||
//
|
|
||||||
InitPieVectTable();
|
|
||||||
|
|
||||||
//
|
|
||||||
// Interrupts that are used in this example are re-mapped to
|
|
||||||
// ISR functions found within this file.
|
|
||||||
//
|
|
||||||
EALLOW; // This is needed to write to EALLOW protected registers
|
|
||||||
PieVectTable.TINT0 = &cpu_timer0_isr;
|
|
||||||
EDIS; // This is needed to disable write to EALLOW protected registers
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 4. Initialize the Device Peripheral. This function can be
|
|
||||||
// found in f2802x_CpuTimers.c
|
|
||||||
//
|
|
||||||
|
|
||||||
//
|
|
||||||
// For this example, only initialize the Cpu Timers
|
|
||||||
//
|
|
||||||
InitCpuTimers();
|
|
||||||
|
|
||||||
//
|
|
||||||
// Configure CPU-Timer 0 to interrupt every 500 milliseconds:
|
|
||||||
// 60MHz CPU Freq, 50 millisecond Period (in uSeconds)
|
|
||||||
//
|
|
||||||
ConfigCpuTimer(&CpuTimer0, 60, 500000);
|
|
||||||
|
|
||||||
//
|
|
||||||
// To ensure precise timing, use write-only instructions to write to the
|
|
||||||
// entire register. Therefore, if any of the configuration bits are changed
|
|
||||||
// in ConfigCpuTimer and InitCpuTimers (in f2802x_CpuTimers.h), the
|
|
||||||
// below settings must also be updated.
|
|
||||||
//
|
|
||||||
|
|
||||||
//
|
|
||||||
// Use write-only instruction to set TSS bit = 0
|
|
||||||
//
|
|
||||||
CpuTimer0Regs.TCR.all = 0x4001;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 5. User specific code, enable interrupts
|
|
||||||
//
|
|
||||||
|
|
||||||
//
|
|
||||||
// Configure GPIO12 (blue LED) and GPIO33 (red LED) as GPIO output pins
|
|
||||||
//
|
|
||||||
EALLOW;
|
|
||||||
GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0;
|
|
||||||
GpioCtrlRegs.GPADIR.bit.GPIO12 = 1;
|
|
||||||
GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 0;
|
|
||||||
GpioCtrlRegs.GPBDIR.bit.GPIO33 = 1;
|
|
||||||
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
|
|
||||||
GpioDataRegs.GPBCLEAR.bit.GPIO33 = 1;
|
|
||||||
EDIS;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Enable CPU INT1 which is connected to CPU-Timer 0
|
|
||||||
//
|
|
||||||
IER |= M_INT1;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Enable TINT0 in the PIE: Group 1 interrupt 7
|
|
||||||
//
|
|
||||||
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Enable global Interrupts and higher priority real-time debug events
|
|
||||||
//
|
|
||||||
EINT; // Enable Global interrupt INTM
|
|
||||||
ERTM; // Enable Global realtime interrupt DBGM
|
|
||||||
|
|
||||||
//
|
|
||||||
// Step 6. IDLE loop. Just sit and loop forever (optional)
|
|
||||||
//
|
|
||||||
for(;;);
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// cpu_timer0_isr -
|
|
||||||
//
|
|
||||||
__interrupt void
|
|
||||||
cpu_timer0_isr(void)
|
|
||||||
{
|
|
||||||
static Uint16 ledState = 0;
|
|
||||||
|
|
||||||
CpuTimer0.InterruptCount++;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Alternate between the blue LED (GPIO12) and the red LED (GPIO33) every 500 milliseconds
|
|
||||||
//
|
|
||||||
if (ledState == 0)
|
|
||||||
{
|
|
||||||
GpioDataRegs.GPASET.bit.GPIO12 = 1;
|
|
||||||
GpioDataRegs.GPBCLEAR.bit.GPIO33 = 1;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;
|
|
||||||
GpioDataRegs.GPBSET.bit.GPIO33 = 1;
|
|
||||||
}
|
|
||||||
ledState = (ledState + 1) % 2;
|
|
||||||
|
|
||||||
//
|
|
||||||
// Acknowledge this interrupt to receive more interrupts from group 1
|
|
||||||
//
|
|
||||||
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// End of File
|
|
||||||
//
|
|
||||||
|
|
||||||
214
F2802x_generic_flash.cmd
Normal file
214
F2802x_generic_flash.cmd
Normal file
@ -0,0 +1,214 @@
|
|||||||
|
/*
|
||||||
|
//###########################################################################
|
||||||
|
//
|
||||||
|
// FILE: F2802x_generic_flash.cmd
|
||||||
|
//
|
||||||
|
// TITLE: Generic Linker Command File for f2802x devices
|
||||||
|
//
|
||||||
|
//###########################################################################
|
||||||
|
// $TI Release: $
|
||||||
|
// $Release Date: $
|
||||||
|
// $Copyright:
|
||||||
|
// Copyright (C) 2009-2026 Texas Instruments Incorporated - http://www.ti.com/
|
||||||
|
//
|
||||||
|
// Redistribution and use in source and binary forms, with or without
|
||||||
|
// modification, are permitted provided that the following conditions
|
||||||
|
// are met:
|
||||||
|
//
|
||||||
|
// Redistributions of source code must retain the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer.
|
||||||
|
//
|
||||||
|
// Redistributions in binary form must reproduce the above copyright
|
||||||
|
// notice, this list of conditions and the following disclaimer in the
|
||||||
|
// documentation and/or other materials provided with the
|
||||||
|
// distribution.
|
||||||
|
//
|
||||||
|
// Neither the name of Texas Instruments Incorporated nor the names of
|
||||||
|
// its contributors may be used to endorse or promote products derived
|
||||||
|
// from this software without specific prior written permission.
|
||||||
|
//
|
||||||
|
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
// $
|
||||||
|
//###########################################################################
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* ======================================================
|
||||||
|
// For Code Composer Studio V2.2 and later
|
||||||
|
// ---------------------------------------
|
||||||
|
// In addition to this memory linker command file,
|
||||||
|
// add the header linker command file directly to the project.
|
||||||
|
// The header linker command file is required to link the
|
||||||
|
// peripheral structures to the proper locations within
|
||||||
|
// the memory map.
|
||||||
|
//
|
||||||
|
// The header linker files are found in <base>\headers\cmd
|
||||||
|
//
|
||||||
|
// For BIOS applications add: F2802x_Headers_BIOS.cmd
|
||||||
|
// For nonBIOS applications add: F2802x_Headers_nonBIOS.cmd
|
||||||
|
========================================================= */
|
||||||
|
|
||||||
|
/* ======================================================
|
||||||
|
// For Code Composer Studio prior to V2.2
|
||||||
|
// --------------------------------------
|
||||||
|
// 1) Use one of the following -l statements to include the
|
||||||
|
// header linker command file in the project. The header linker
|
||||||
|
// file is required to link the peripheral structures to the proper
|
||||||
|
// locations within the memory map */
|
||||||
|
|
||||||
|
/* Uncomment this line to include file only for non-BIOS applications */
|
||||||
|
/* -l F2802x_Headers_nonBIOS.cmd */
|
||||||
|
|
||||||
|
/* Uncomment this line to include file only for BIOS applications */
|
||||||
|
/* -l F2802x_Headers_BIOS.cmd */
|
||||||
|
|
||||||
|
/* 2) In your project add the path to <base>\headers\cmd to the
|
||||||
|
library search path under project->build options, linker tab,
|
||||||
|
library search path (-i).
|
||||||
|
/*========================================================= */
|
||||||
|
|
||||||
|
/* Define the memory block start/length for the F2802x
|
||||||
|
PAGE 0 will be used to organize program sections
|
||||||
|
PAGE 1 will be used to organize data sections
|
||||||
|
|
||||||
|
Notes:
|
||||||
|
Memory blocks on F2802x are uniform (ie same
|
||||||
|
physical memory) in both PAGE 0 and PAGE 1.
|
||||||
|
That is the same memory region should not be
|
||||||
|
defined for both PAGE 0 and PAGE 1.
|
||||||
|
Doing so will result in corruption of program
|
||||||
|
and/or data.
|
||||||
|
|
||||||
|
Contiguous SARAM memory blocks or flash sectors can be
|
||||||
|
be combined if required to create a larger memory block.
|
||||||
|
*/
|
||||||
|
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
PAGE 0: /* Program Memory */
|
||||||
|
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
|
||||||
|
|
||||||
|
RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */
|
||||||
|
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
|
||||||
|
FLASHA : origin = 0x3F7000, length = 0x000F80 /* on-chip FLASH */
|
||||||
|
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */
|
||||||
|
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */
|
||||||
|
CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */
|
||||||
|
FLASHB : origin = 0x3F6000, length = 0x001000 /* on-chip FLASH */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
IQTABLES : origin = 0x3FE000, length = 0x000B50 /* IQ Math Tables in Boot ROM */
|
||||||
|
IQTABLES2 : origin = 0x3FEB50, length = 0x00008C /* IQ Math Tables in Boot ROM */
|
||||||
|
IQTABLES3 : origin = 0x3FEBDC, length = 0x0000AA /* IQ Math Tables in Boot ROM */
|
||||||
|
|
||||||
|
ROM : origin = 0x3FF27C, length = 0x000D44 /* Boot ROM */
|
||||||
|
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */
|
||||||
|
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */
|
||||||
|
|
||||||
|
PAGE 1 : /* Data Memory */
|
||||||
|
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
|
||||||
|
/* Registers remain on PAGE1 */
|
||||||
|
|
||||||
|
BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */
|
||||||
|
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
|
||||||
|
RAML0 : origin = 0x008000, length = 0x000400 /* on-chip RAM block L0 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Allocate sections to memory blocks.
|
||||||
|
Note:
|
||||||
|
codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code
|
||||||
|
execution when booting to flash
|
||||||
|
ramfuncs user defined section to store functions that will be copied from Flash into RAM
|
||||||
|
*/
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
|
||||||
|
/* Allocate program areas: */
|
||||||
|
codestart : > BEGIN PAGE = 0
|
||||||
|
|
||||||
|
ramfuncs : LOAD = FLASHA,
|
||||||
|
RUN = RAMM0,
|
||||||
|
LOAD_START(_RamfuncsLoadStart),
|
||||||
|
LOAD_SIZE(_RamfuncsLoadSize),
|
||||||
|
RUN_START(_RamfuncsRunStart),
|
||||||
|
PAGE = 0
|
||||||
|
|
||||||
|
.cinit : > FLASHA | FLASHB, PAGE = 0
|
||||||
|
.pinit : > FLASHA | FLASHB, PAGE = 0
|
||||||
|
.text : >> FLASHA | FLASHB, PAGE = 0
|
||||||
|
|
||||||
|
csmpasswds : > CSM_PWL_P0, PAGE = 0
|
||||||
|
csm_rsvd : > CSM_RSVD, PAGE = 0
|
||||||
|
|
||||||
|
/* Allocate uninitalized data sections: */
|
||||||
|
.stack : > RAMM1, PAGE = 1
|
||||||
|
.ebss : >> RAMM1 | RAML0, PAGE = 1
|
||||||
|
.esysmem : >> RAMM1 | RAML0, PAGE = 1
|
||||||
|
|
||||||
|
/* Initalized sections go in Flash */
|
||||||
|
/* For SDFlash to program these, they must be allocated to page 0 */
|
||||||
|
.econst : >> FLASHA | FLASHB, PAGE = 0
|
||||||
|
.switch : >> FLASHA | FLASHB, PAGE = 0
|
||||||
|
|
||||||
|
/* Allocate IQ math areas: */
|
||||||
|
IQmath : >> FLASHA | FLASHB, PAGE = 0 /* Math Code */
|
||||||
|
IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD
|
||||||
|
|
||||||
|
/* Uncomment the section below if calling the IQNexp() or IQexp()
|
||||||
|
functions from the IQMath.lib library in order to utilize the
|
||||||
|
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
|
||||||
|
is 1 wait-state). If this section is not uncommented, IQmathTables2
|
||||||
|
will be loaded into other memory (SARAM, Flash, etc.) and will take
|
||||||
|
up space, but 0 wait-state is possible.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
|
||||||
|
{
|
||||||
|
|
||||||
|
IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
|
||||||
|
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
/* Uncomment the section below if calling the IQNasin() or IQasin()
|
||||||
|
functions from the IQMath.lib library in order to utilize the
|
||||||
|
relevant IQ Math table in Boot ROM (This saves space and Boot ROM
|
||||||
|
is 1 wait-state). If this section is not uncommented, IQmathTables2
|
||||||
|
will be loaded into other memory (SARAM, Flash, etc.) and will take
|
||||||
|
up space, but 0 wait-state is possible.
|
||||||
|
*/
|
||||||
|
/*
|
||||||
|
IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD
|
||||||
|
{
|
||||||
|
|
||||||
|
IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)
|
||||||
|
|
||||||
|
}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* .reset is a standard section used by the compiler. It contains the */
|
||||||
|
/* the address of the start of _c_int00 for C Code. /*
|
||||||
|
/* When using the boot ROM this section and the CPU vector */
|
||||||
|
/* table is not needed. Thus the default type is set here to */
|
||||||
|
/* DSECT */
|
||||||
|
.reset : > RESET, PAGE = 0, TYPE = DSECT
|
||||||
|
vectors : > VECTORS PAGE = 0, TYPE = DSECT
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
//===========================================================================
|
||||||
|
// End of file.
|
||||||
|
//===========================================================================
|
||||||
|
*/
|
||||||
Reference in New Issue
Block a user